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? 2012 microchip technology inc. ds22306a-page 1 mcp2025 features ? the mcp2025 is compliant with: - lin bus specifications version 1.3, and 2.x - sae j2602-2 ? supports baud rates up to 20 kbaud ? 43v load dump protected ? maximum continuous input voltage of 30v ? wide lin compliant supply voltage: 6.0-18.0v ? extended temperature range: -40 to +125c ? interface to pic ? eusart and standard usarts ? wake-up on lin bus activity or local wake input ? lin bus pin - internal pull-up termination resistor and diode for slave node - protected against v bat shorts - protected against loss of ground - high current drive ? txd and lin bus dominant time-out function ? two low-power modes - transmitter-off: 90 a (typical) - power-down mode: 4.5 a (typical) ? mcp2025 on-chip voltage regulator - output voltage of 5.0v or 3.3v 70 ma capability with tolerances of 3% over temperature range. - internal short circuit current limit - only external filter and load capacitors needed ? automatic thermal shutdown ? high electromagnetic immunity (emi), low electromagnetic emission (eme) ? robust esd performance: 15 kv for lbus and vbb pin (iec61000-4-2) ? transient protection for lbus and vbb pins in automotive environment (iso7637) ? meets stringent automotive design requirements including ?oem hardware requirements for lin, can and flexray interfaces in automotive applications?, version 1.2, march 2011 ? multiple package options including small 4x4 mm dfn description the mcp2025 provides a bidirectional, half-duplex communication physical interface to meet the lin bus specification revision 2.1 and sae j2602-2. the device incorporates a voltage regulator with 5v or 3.3v 70 ma regulated power supply output. the device has been designed to meet the stringent quiescent current requirements of the automotive industry and will survive +4 3 v load dump transients, and double battery jumps. mcp2025 family members include: - mcp2025-500, 8-pin, lin driver with 5.0v regulator - mcp2025-330, 8-pin, lin driver with 3.3v regulator package types (top view) pdip, soic v ss cs/lwake lin 1 2 3 4 8 7 6 5 v bb vreg reset txd rxd 4x4 dfn 1 2 3 4 8 7 6 5 ep 9 v ss cs/lwake lin v bb vreg reset txd rxd mcp2025 lin transceiver with voltage regulator
mcp2025 ds22306a-page 2 ? 2012 microchip technology inc. block diagram voltage regulator ratiometric reference thermal protection internal circuits v reg rxd txd v bb l bus v ss ~30 cs/lwake wake-up logic and power control reset short circuit protection thermal protection k ? bus wakeup and short circuit slope control v reg 4.2v bus dominant timer
? 2012 microchip technology inc. ds22306a-page 3 mcp2025 1.0 function description the mcp2025 provides a physical interface between a microcontroller and a lin half-duplex bus. it is intended for automotive and industrial applications with serial bus baud rates up to 20 kbaud. this device will translate the cmos/ttl logic levels to lin logic levels, and vice versa. the device offers optimum emi and esd performance; it can withstand high voltage on the lin bus. the device supports two low-power modes to meet automotive industry power consumption requirements. the mcp2025 also provides a +5v or 3.3v 70 ma regulated power output. 1.1 modes of operation the mcp2025 works in five modes: power-on- reset mode, power-down mode, ready mode, operation mode, and tr ansmitter-off mode. for an overview of all operational modes, please refer to table 1-1 . for the operational mode transition, please refer to figure 1-1 . figure 1-1: state diagram 1.1.1 power-on-reset mode upon application of v bb , or whenever the voltage on vbb is below the threshold of regulator turn off voltage v off (typically 4.50v), the device enters power-on- reset mode (por). during this mode, the device maintains the digital section in a reset mode and waits until the voltage on pin vbb rises above the threshold of regulator turn on voltage v on (typically 5.75v) to enter ready mode. in power-on-reset mode, the lin physical layer and voltage regulator are disabled, and the reset pin is switched to ground. por (2) vreg off rx off tx off ready vreg on rx on tx off tx off vreg on rx on tx off power-down vreg off rx off tx off operation vreg on rx on tx on vbb>v on cs/lwake=0 &txd=0 cs/lwake=1 &txd=1 vreg_ok=1 (1) cs/lwake=1& txd=1& no fault (3) cs/lwake=0 or fault detected (3) cs/lwake=1 or voltage rising edge on lbus cs/lwake=0 cs=1 &txd=0& vreg_ok=1 (1) note 1: vreg_ok : regulator output voltage > 0.8v reg_nom. 2: if the voltage on pin vbb falls below v off , the device will enter power-on reset mode from all other modes, which is not shown in the figure. 3: faults include txd/lbus permanent dominant, lbus short to vbb, thermal protection, and vreg_ok is false.
? 2012 microchip technology inc. ds22306a-page 4 mcp2025 1.1.2 ready mode the device enters ready mode from por mode after the voltage on v bb rises above the threshold of regulator turn on voltage v on or from power-down mode when a remote or local wake-up event happens. upon entering ready mode, the voltage regulator and receiver section of the transceiver are powered up. the transmitter remains in an off state. the device is ready to receive data but not to transmit. in order to minimize the power consumption, the regulator operates in a reduced power mode. it has a lower gbw product and thus is slower. however, the 70 ma drive capability is unchanged. the device stays in ready mode until the output of the voltage regulator has stabilized and cs/lwake pin is high (? 1 ?). 1.1.3 operation mode if the cs/lwake pin changes to high while v reg is ok (v reg > 0.8*v reg_nom ) and txd pin is high, the part enters operation mode from either ready or transmitter-off mode. in this mode, all internal modules are operational. the internal pull-up resistor between lbus and vbb is con- nected only in this mode. the device goes to transmitter-off mode at the falling edge on the cs/lwake pin or when a fault is detected. 1.1.4 transmitter off mode if v reg is ok (v reg > 0.8*v reg_nom ), the transmit- ter-off mode can be reached by setting cs/lwake to high when txd pin is low from ready mode; or by pulling down cs/lwake to low from operation mode . in transmitter-off mode, the receiver is enabled but the l bus transmitter is off. it is a lower power mode. in order to minimize the power consumption, the regu- lator operates in a reduced power mode. it has a lower gbw product and thus is slower. however, the 70 ma drive capability is unchanged. the transmitter is also turned off whenever the voltage regulator is unstable or recovering from a fault. this prevents unwanted disruption on the bus during times of uncertain operation. 1.1.5 power-down mode power-down mode is entered by pulling down both the cs/lwake pin and txd to low from transmit- ter-off mode. in power-down mode, the trans- ceiver and the voltage regulator are both off. only the bus wake-up section and the cs/lwake pin wake-up circuits are in operation. this is the lowest power mode. if any bus activity (e.g. a break character) occurs or cs/lwake is set to high during power-down mode, the device will immediately enter ready mode and enable the voltage regulator. then, once the regu- lator output has stabilized (approximately 0.3 ms to 1.2 ms) it can go to either the operation mode or transmitter-off mode. refer to section 1.1.6 ?remote wake-up? for more details. 1.1.6 remote wake-up the remote wake-up sub module observes the l bus in order to detect bus activity. in power-down mode, the normal lin recessive/dominant threshold is disabled, and the lin bus wake-up voltage threshold v wk ( lbus ) is used to detect bus activities. bus activity is detected when the voltage on the l bus falls below the lin bus wake-up voltage threshold v wk ( lbus ) (approximately 3.4v) for at least t bdb (a typical duration of 80 s ) followed by a rising edge. such a condition causes the device to leave power-down mode. note: the txd pin needs to be set high before setting the cs/lwake pin to low in order to jump and stay in transmitter-off mode. if the txd pin is set or maintained low before setting the cs/lwake pin to low, the part will transit to transmitter- off mode and then jump to power- down mode after a deglitch delay of about 20 s. table 1-1: overview of operational modes state transmitter receiver internal wake module voltage regulator operation comments power-on- reset off off off off transfer to readymode after v bb > v on ready off on off on if cs/lwake is high, then proceed to operation or transmitter-off mode bus off state operation on on off on if cs/lwake is low level, then transmitter- off mode normal operation mode power-down off off on activity detect off on lin bus rising edge or cs/lwake high level, go to ready mode lowest power mode transmitter- off off on off on if txd and cs/lwake low level, then power- down if txd and cs/lwake high level, then operation bus off state, lower power mode
? 2012 microchip technology inc. ds22306a-page 5 mcp2025 1.2 pin descriptions please refer to ta b l e 1 - 2 for the pinout overview. 1.2.1 vbb battery positive supply voltage pin. an external diode is connected in series to prevent the device from being reversely powered (refer to figure 1-9 ). 1.2.2 vreg positive supply voltage regulator output pin. an on- chip low dropout regulator (ldo) gives +5.0 or +3.3v 70 ma regulated voltage on this pin. 1.2.3 vss ground pin. 1.2.4 txd transmit data input pin (ttl level, hv compliant, adaptive pull-up). the transmitter reads the data stream on the txd pin and sends it to the lin bus. the lbus pin is low (dominant) when txd is low, and high (recessive) when txd is high. the transmit data input pin has an internal adaptive pull-up to an internally-generated 4.2v (approximately). when txd is ? 0 ?, a weak pull-up (~900 k ? ) is used to reduce current. when txd is ? 1 ? a stronger pull-up (~300 k ? ) is used to maintain the logic level. a series reverse-blocking diode allows applying txd input voltages greater than the internally generated 4.2v and renders the txd pin hv compliant up to 30v (see block diagram ). 1.2.5 rxd receive data output pin. the rxd pin is a standard cmos output pin and it follows the state of the lbus pin. 1.2.6 lbus lin bus pin. lbus is a bidirectional lin bus interface pin and is controlled by the signal txd. it has an open collector output with a current limitation. to reduce electromagnetic emission, the slopes during signal changes are controlled, and the l bus pin has corner- rounding control for both falling and rising edges. the internal lin receiver observes the activities on the lin bus, and generates the output signal rxd that follows the state of the l bus . a first degree 160 khz, low-pass input filter optimizes electromagnetic immunity. 1.2.7 cs/lwake chip select and local wake-up input pin (ttl level, high voltage tolerant). this pin controls the device state transition. refer to figure 1-1 . an internal pull-down resistor will keep the cs/lwake pin low to ensure that no disruptive data will be present on the bus while the microcontroller is executing a power-on reset and i/o initialization sequence. when cs/lwake is ? 1 ?, a weak pull-down (~600 k ? ) is used to reduce current. when cs/lwake is ? 0 ? a stronger pull-down (~300 k ? ) is used to maintain the logic level. this pin may also be used as a local wake-up input (see figure 1-9 ). the microcontroller will set the i/o pin to control the cs/lwake. an external switch, or other source, can then wake-up both the transceiver and the microcontroller. 1.2.8 r eset reset output pin. this is an open drain output pin. it indicates the internal voltage has reached a valid, stable level. as long as the internal voltage is valid (above 0.8vreg), this pin will present high impedance; otherwise the reset pin switches to ground. table 1-2: pinout overview note: cs/lwake should not be tied directly to pin v reg as this could force the mcp2025 into operation mode before the microcontroller is initialized. pin name pin number pin type function vreg 8 output voltage regulator output vss 3 power ground vbb 1 power battery txd 6 input, hv-tolerant transmit data input rxd 5 output receive data output lbus 4 i/o, hv lin bus cs/lwake 2 ttl input, hv-tolerant chip select and local wake-up input reset 7 open drain output, hv- tolerant reset output
? 2012 microchip technology inc. ds22306a-page 6 mcp2025 1.3 fail-safe features 1.3.1 general fail-safe features ? an internal pull-down resistor on the cs/lwake pin disables the transmitter if the pin is floating. ? an internal pull-up resistor on the txd pin places txd in high, thus the lbus is recessive if the txd pin is floating. ? high-impedance and low leakage current on lbus during loss of power or ground. ? the current limit on lbus protects the transceiver from being damaged if the pin is shorted to v bb . 1.3.2 thermal protection the thermal protection circuit monitors the die temperature and is able to shut down the lin transmitter and voltage regulator. there are three causes for a thermal overload. a thermal shut down can be triggered by any one, or a combination of, the following thermal overload conditions: ? voltage regulator overload ? lin bus output overload ? increase in die temperature due to increase in environment temperature the recovery time from the thermal shutdown is equal to adequate cooling time. driving the txd and checking the rxd pin makes it possible to determine whether there is a bus contention (txd = high, rxd = low) or a thermal overload condi- tion (txd = low, rxd = high). figure 1-2: thermal shutdown state diagrams 1.3.3 txd/lbus time-out timer the lin bus can be driven to a dominant level either from the txd pin or externally. an internal timer deac- tivates the lbus transmitter if a dominant status (low) on the lin bus lasts longer than bus dominant time-out time t to(lin) (approximately 20 milliseconds); at the same time, rxd output is put in recessive (high) and the internal pull-up resistor between lbus and vbb is disconnected. the timer is reset on any recessive l bus status or por mode. the recessive status on l bus can be caused either by the bus being externally pulled up or by the txd pin being returned high. 1.4 internal voltage regulator the mcp2025 has a positive regulator capable of sup- plying +5.00 or +3.30 v dc 3% at up to 70ma of load current over the entire operating temperature range of -40c to +125c. the regulator uses an ldo design, is short-circuit-protected and will turn the regulator output off if its output falls below the shutdown voltage threshold v sd . with a load current of 70ma, the minimum input to out- put voltage differential required for the output to remain in regulation is typically +0.5v (+1v maximum over the full operating temperature range). quiescent current is less than 100 a with a full 70ma load current when the input to output voltage differential is greater than +3.00v. regarding the correlation between v bb , v reg and i dd , please refer to figure 1-6 and figure 1-7 . when the input voltage (v bb ) drops below the differential needed to provide stable regulation, the voltage regulator output v reg will track the input down to approximately v off . the regulator will turn off the output at this point. this will allow pic microcontrollers, with internal por circuits, to generate a clean arming of the power-on reset trip point. the mcp2025 will then monitor v bb and turn on the regulator when v bb is above the thresh- old of regulator turn on voltage v on . under specific ambient temperature and battery volt- age range, the voltage regulator can output as high as 150 ma current. for current load capability of the volt- age regulator, refer to figure 1-4 and figure 1-5 . in power-down mode, the v bb monitor is turned off (see section 1.1.5 ?power-down mode? for details). the regulator requires an external output bypass capacitor for stability. see figure 2-1: ?esr curves for load capacitor selection? for correct capacity and esr for stable operation. operation mode transmitter shutdown lin bus voltage shutdown regulator output te m p < shutdown temp shorted to v bb overload temp < shutdown temp note: the regulator overload current limit is approximately 250 ma. the regulator out- put voltage v reg is monitored. if output voltage v reg is lower than v sd , the volt- age regulator will turn off. after a recovery time of about 3ms, the v reg will be checked again. if there is no short circuit, (v reg > v sd ) then the voltage regulator remains on.
? 2012 microchip technology inc. ds22306a-page 7 mcp2025 figure 1-3: voltage regulator block diagram figure 1-4: 5.0v v reg vs. i reg at v bb = 12v figure 1-5: 3.3v v reg vs. i reg at v bb = 12v pass element sampling network buffer v reg v bb v ss fast transient loop v ref 0 1 2 3 4 5 6 0 100 200 300 i reg (ma) -45 25 90 125 reg () 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 i reg (ma) -45 25 90 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 3 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 30 0 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 0 0.5 1 1.5 2 2.5 3 3.5 0 100 200 300 e m 45 25 0 125 e
? 2012 microchip technology inc. ds22306a-page 8 mcp2025 figure 1-6: voltage regulator output on power-on reset note 1: start-up, v bb < v on , regulator off 2: v bb > v on , regulator on . 3: v bb ?? 4: v bb < v off , regulator will turn off 5 3 2 0 (1) (2) (3) t 0 t 6 2 8 4 v bb v v reg v 1 4 v on minimum v bb to maintain regulation v reg-nom minimum v bb to maintain regulation (4) v off
? 2012 microchip technology inc. ds22306a-page 9 mcp2025 figure 1-7: voltage regulator output on over current situation 1.5 optional external protection 1.5.1 reverse battery protection an external reverse-battery-blocking diode should be used to provide polarity protection (see figure 1-9 ). 1.5.2 transient voltage protection (load dump) an external 43v transient suppressor (tvs) diode, between v bb and ground, with a transient protection resistor (r tp ) in series with the battery supply and the v bb pin protects the device from power transients and esd events greater than 43v (see figure 1-9 ). the maximum value for the r tp protection resistor depends upon two parameters: the minimum voltage the part will start at, and the impacts of this r tp resistor on the v bb value, thus on the bus recessive level and slopes. this leads to a set of three equations to fulfill. equation 1-1 provides a max r tp value, according to the minimum battery voltage the user wants the part to start with. equation 1-2 provides a max r tp value according to the maximum error on the recessive level, thus v bb, since the part uses v bb as the reference value for the recessive level. equation 1-3 provides a max r tp value according to the maximum relative variation the user can accept on the slope when i reg varies. since both equation 1-1 and equation 1-2 must be ful- filled, the maximum allowed value for rtp is the smaller of the two values found when solving equation 1-1 and equation 1-2 . usually, equation 1-1 gives the higher constraint (smaller value) for r tp as shown in the example where v batmin is 8v. however, the user needs to verify that the value found in equation 1-1 also satisfies equation 1-2 and equation 1-3 . while this protection is optional, it should be considered as good engineering practice. note 1: i reg less than i lim , regulator on 2: after i reg exceeds i lim , voltage regulator output will be reduced until voltage regulator shutdown voltage v sd is reached. v sd 0 (1) (2) t 0 t i lim i reg ma v reg v v reg -nom 1 2 3 4 5 6
? 2012 microchip technology inc. ds22306a-page 10 mcp2025 equation 1-1: assume that v batmin = 8v. equation 1-1 gives 10 ? . equation 1-2: assume that ? v reccessive = 1v and i regmax =50 ma. equation 1-2 gives 20 ? . equation 1-3: assume that ? slope =15%, v batmin =8v and i regmax =50ma. equation 1-3 gives 20 ? . 1.5.3 c bat cap selecting c bat = 10* c reg is recommended, however this leads to a high value cap. lower values for c bat cap can be used, but certain rules must be followed. in any case, the voltage at the v bb pin should remain above v off when the device is turned on. the current peak at start-up (due to the fast charge of the c reg and c bat capacitor) may induce a significant drop on the v bb pin. this drop is proportional to the impedance of the v bat connection (see figure 1-9 ). let?s assume that the v bat connection is mainly induc- tive and resistive, and that the customer knows the resistive and inductive values of the connection. the following formula gives an indication of the minimum value the customer should use for c bat : equation 1-4: equation 1-4 allows lower c bat /c reg values than the 10* ratio we recommend. assumee that we have a good quality connection with r tot = 0.1 ? and l = 0.1 mh. solving the equation results in c bat /c reg = 1. if r tot is increased to 1 ? , the result becomes c bat / c reg = 1.4 but if the connection is highly resistive or highly induc- tive (poor connection), the c bat /c reg ratio greatly increases. for a highly inductive connection: r tot = 0.1 ? and l = 1 mh; the c bat /c reg ratio increases to 7. for a highly resistive connection: r tot =10 ? and l = 0.1 mh: again, the c bat /c reg ratio increases to 7. figure 1-8 shows the minimum recommended c bat / c reg ratio as a function of the impedance of the v bat connection. 250 ma is the peak current at power-on when v bb = 5.5v r tp <= ? v reccessive / i regmax . ? v reccessive is the maximum variation tolerated on the recessive level ? slope is the maximum variation tolerated on the slope level and i regmax is the maximum current the regulator will provide to the load. v batmin >v off + 1.0v, r tp v batmin 5.5 v ? 250 ma ------------------------------------ - ? 5.5 vv off 1.0 v + = r tp ? slope v batmin 1 v ? ?? ? i regmax -------------------------------------------------------------- ? where l is in mh and r tot in ? . r tot = r line + r tp c bat c reg ------------- 100 l 2 r tot 2 + 1 l 2 r tot 2 100 -------- - ++ ------------------------------ - =
? 2012 microchip technology inc. ds22306a-page 11 mcp2025 figure 1-8: minimum recommended c bat /c reg ratio c bat /c reg 1 10 0.1 1 vbat line inductance [mh] cbat/creg ratio as function of the vbat line impedance rbat=0.1 rbat=0.3 rbat=1 rbat=2 rbat=4 rbat=10 c bat /c reg
? 2012 microchip technology inc. ds22306a-page 12 mcp2025 1.6 typical applications figure 1-9: typical application circuit figure 1-10: typical li n network configuration lin bus 43v (4) v bb l bus v reg txd rxd v ss v dd txd rxd c v bat c bat c reg cs/lwake i/o 43v (5) 1k ? v bb master node only v bat 10 k ? wake-up note 1: c reg , the load capacitor, should be ceramic or tantalum-rated for extended temperatures, 1.0- 22 f. see figure 2-1 for selecting correct esr. 2: c bat is the filter capacitor for the external voltage supply. typically 10 * c reg with no esr restriction. see figure 1-8 to select the minimum recommended value for c bat . the r tp value is added to the line resistance. 3: this diode is only needed if cs/lwake is connected to v bat supply. 4: transient suppressor diode. vclamp l = 43v. 5: this component is for additional load dump protection. (3) rtp reset reset v ss lin bus mcp2025 master c 1k ? v bb slave 1 c slave 2 c slave n <16 c 40m + return lin bus lin bus mcp205x lin bus mcp202xa lin bus mcp2003
? 2012 microchip technology inc. ds22306a-page 13 mcp2025 2.0 electrical characteristics 2.1 absolute maximum ratings? v in dc voltage on rxd, and reset ................................................................................................. -0.3v to v reg +0.3 v in dc voltage on txd, cs/lwake ................................................................................................... ..........-0.3 to +40v v bb battery voltage, continuous, non-operating ( note 1 )..............................................................................-0.3 to +40v v bb battery voltage, non-operating (lin bus recessive, no regulator load, t < 60s) ( note 2 ) .......................-0.3 to +43v v bb battery voltage, transient iso 7637 test 1 ................................................................................... ...................-100v v bb battery voltage, transient iso 7637 test 2a .................................................................................. ...................+75v v bb battery voltage, transient iso 7637 test 3a .................................................................................. ..................-150v v bb battery voltage, transient iso 7637 test 3b .................................................................................. .................+100v v lbus bus voltage, continuous....................................................................................................... ................-18 to +30v v lbus bus voltage, transient ( note 3 )............................................................................................................-27 to +43v i lbus bus short circuit current limit ............................................................................................... .....................200 ma esd protection on lin, v bb (iec 61000-4-2) ( note 4 ) .......................................................................................... 15 kv esd protection on lin, v bb (human body model) ( note 5 ).................................................................................... 8 kv esd protection on all other pins (human body model) ( note 5 ) ............................................................................. 4 kv esd protection on all pins (charge device model) ( note 6 ) ................................................................................1500v esd protection on all pins (machine model) ( note 7 ).............................................................................................200v maximum junction temperature ................................................................................................... .......................... 150 ? c storage temperature ............................................................................................................ ...................... -65 to +150 ? c note 1: lin 2.x compliant specification. 2: sae j2602 compliant specification. 3: iso 7637 immunity against transients (t < 500 ms). 4: according to iec 61000-4-2, 330 ? , 150 pf and transceiver emc test specifications [2] to [4]. 5: according to aec-q100-002 / jesd22-a114. 6: according to aec-q100-011b. 7: according to aec-q100-003 / jesd22-a115. 2.2 nomenclature used in this document some terms and names used in this data sheet deviate from those referred to in the lin specifications. equivalent values are shown below. ? notice : stresses above those listed under ?maximum ratings? may cause permanent damage to the device. this is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. exposure to maximum rating conditions for extended periods may affect device reliability. lin 2.1 name term used in the following tables v bat not used ecu operating voltage v sup v bb supply voltage at device pin v bus _ lim i sc current limit of driver v busrec v ih (l bus ) recessive state v busdom v il (l bus ) dominant state
mcp2025 ds22306a-page 14 ? 2012 microchip technology inc. 2.3 dc specifications dc specifications electrical characteristics: unless otherwise indicated, all limits are specified for: v bb = 6.0v to 18.0v t a = -40c to +125c parameter sym. min. typ. max. units conditions power v bb quiescent operating current i bbq ?? 200 ai out = 0 ma, l bus recessive v reg = 5.0v ?? 200 ai out = 0 ma, l bus recessive v reg = 3.3v v bb ready current i bbrd ?? 100 ai out = 0 ma, l bus recessive v reg = 5.0v ?? 100 ai out = 0 ma, l bus recessive v reg = 3.3v v bb transmitter-off current with watchdog disabled i bbto ? ? 100 a with voltage regulator on, transmitter off, receiver on, cs = v ih ,v reg = 5.0v ? ? 100 a with voltage regulator on, transmitter off, receiver on, cs = v ih ,v reg = 3.3v v bb power-down current i bbpd ? 4.5 8 a with voltage regulator powered off, receiver on and transmitter off, cs = v il . v bb current with v ss floating i bbnognd -1 ? 1mav bb = 12v, gnd to v bb , v lin = 0-18v microcontroller interface high-level input voltage (t xd ) v ih 2.0 ? 30 v low-level input voltage (t xd ) v i l -0.3 ? 0.8 v high-level input current (t xd )i ih -2.5 ? 0.4 a input voltage = 4.0v. ~800 k ? internal adaptive pull-up low-level input current (t xd ) i il -10 ? ? a input voltage = 0.5v. ~800 k ? internal adaptive pull-up high-level input voltage (cs/lwake) v ih 2 ? 30 v through a current-limiting resistor low-level input voltage (cs/lwake) v il -0.3 ? 0.8 v high-level input current (cs/ lwake) i ih ? ? 8.0 a input voltage = 0.8v reg ~1.3 m ? internal pull-down to v ss low-level input current (cs/ lwake) i il ? ? 5.0 a input voltage = 0.2v reg ~1.3 m ? internal pull-down to v ss low-level output voltage (r xd )v ol rxd ? ? 0.2v reg vi ol = 2 ma high-level output voltage (r xd ) v oh rxd 0.8 v reg ?? vi oh = 2 ma note 1: internal current limited. 2.0 ms maximum recovery time (r lbus = 0 ? , tx = 0, v lbus = v bb ). 2: for design guidance only, not tested. 3: in power-down mode, normal lin recessive/dominant threshold is disabled; v wk ( lbus ) is used to detect bus activities.
? 2012 microchip technology inc. ds22306a-page 15 mcp2025 bus interface (dc specifications are for a v bb range of 6.0 to 18.0v) high-level input voltage v ih (l bus ) 0.6 v bb ? ? v recessive state low-level input voltage v il (l bus )-8 ?0.4 v bb v dominant state input hysteresis v hys ? ? 0.175 v bb vv ih (l bus ) ? v il (l bus ) low-level output current i ol (l bus ) 40 ? 200 ma output voltage = 0.1 v bb , v bb = 12v pull-up current on input i pu (l bus ) -180 ? -72 a ~30 k ? internal pull-up @ v ih (l bus ) = 0.7 v bb , v bb =12v short circuit current limit i sc 50 ? 200 ma ( note 1 ) high-level output voltage v oh (l bus ) 0.8 v bb ?v bb v driver dominant voltage v_ losup ?? 1.1 vv bb = 7.3v, r load = 1000 ? driver dominant voltage v_ hisup ?? 1.2 vv bb = 18v, r load = 1000 ? input leakage current (at the receiver during dominant bus level) i bus _ pas _ dom -1 ? ? ma driver off, v bus = 0v, v bb = 12v input leakage current (at the receiver during recessive bus level) i bus _ pas _ rec -20 ? 20 a driver off, 8v < v bb < 18v 8v < v bu s < 18v v bus ? v bb leakage current (disconnected from ground) i bus _ no _ g nd -10 ? +10 a gnd device = v bb , 0v < v bus < 18v, v bb = 12v leakage current (disconnected from v bb ) i bus _no_p wr -10 ? +10 a v bb = gnd, 0 < v bus < 18v receiver center voltage v bus _ cnt 0.475 v bb 0.5 v bb 0.525 v bb vv bus _ cnt = (v il (l bus ) + v ih (l bus ))/2 slave termination r slave 20 30 47 k ? ( note 2 ) capacitance of slave node c slave 50 pf ( note 2 ) wake-up voltage threshold on lin bus v wk(lbus) ? ? 3.4 v wake up from power-down mode ( note 3 ) 2.3 dc specifications (continued) dc specifications electrical characteristics: unless otherwise indicated, all limits are specified for: v bb = 6.0v to 18.0v t a = -40c to +125c parameter sym. min. typ. max. units conditions note 1: internal current limited. 2.0 ms maximum recovery time (r lbus = 0 ? , tx = 0, v lbus = v bb ). 2: for design guidance only, not tested. 3: in power-down mode, normal lin recessive/dominant threshold is disabled; v wk ( lbus ) is used to detect bus activities.
mcp2025 ds22306a-page 16 ? 2012 microchip technology inc. 2.3 dc specification (continued) dc specifications electrical characteristics: unless otherwise indicated, all limits are specified for: v bb = 6.0v to 18.0v t a = -40c to +125c c loadreg = 10 f parameter sym. min. typ. max. units conditions voltage regulator - 5.0v output voltage range v reg 4.85 5.00 5.15 v 0 ma < i out < 70 ma line regulation ? v out 1?1050mvi out = 1 ma, 6.0v < v bb < 18v load regulation ? v out 2?1050mv5ma < i out <70 ma 6.0v < v bb < 12v power supply ripple reject psrr ? ? 50 db 1 v pp @10-20 khz i load = 20 ma output noise voltage en ? ? 100 v rms 10 hz ? 40 mhz c filter = 10 f, c bp = 0.1 f, i load = 20 ma shutdown voltage threshold v sd 3.5 ? 4.0 v see figure 1-7 ( note 1 ) input voltage to turn-off output v off 3.9 ? 4.5 v input voltage to turn-on output v on 5.25 ? 6.0 v voltage regulator - 3.3v output voltage v reg 3.20 3.30 3.40 v 0 ma < i out < 70 ma line regulation ? v out 1?1050mvi out = 1 ma, 6.0v < v bb < 18v load regulation ? v out 2?1050mv5ma < i out < 70 ma, 6.0v < v bb < 12v power supply ripple reject psrr ? 50 ? db 1 v pp @10-20 khz , i load = 20 ma output noise voltage en ? ? 100 v rms / ? hz 10 hz ? 40 mhz c filter = 10 f, c bp = 0.1 f, i load = 20 ma shutdown voltage v sd 2.5 ? 2.7 v see figure 1-7 ( note 2 ) input voltage to turn-off output v off 3.9 ? 4.5 v input voltage to turn-on output v on 5.25 ? 6 v
? 2012 microchip technology inc. ds22306a-page 17 mcp2025 figure 2-1: esr curves fo r load capacitor selection load capacitor [uf] esr curves esr [ohm] 10 1 0.1 0.01 0.001 10 100 1000 1 0.1 instable instable instable stable only with tantalum or electrolytic cap. stable with tantalum, electrolytic and ceramic cap. ntable ntable ntable
mcp2025 ds22306a-page 18 ? 2012 microchip technology inc. 2.4 ac specification ac characteristics v bb = 6.0v to 18.0v; t a = -40c to +125c parameter sym. min. typ. max. units test conditions bus interface - constant slope time parameters (dc specifications are for a v bb range of 6.0 to 18.0v) slope rising and falling edges t slope 3.5 ? 22.5 s 7.3v <= v bb <= 18v propagation delay of transmitter t transpd ??6.0st transpd = max (t transpdr or t transpdf ) propagation delay of receiver t recpd ??6.0st recpd = max (t recpdr or t recpdf ) symmetry of propagation delay of receiver rising edge w.r.t. falling edge t recsym -2.0 ? 2.0 s trecsym = max (trecpdf ? trecpdr) r rxd 2.4k ?? to v cc , c rxd 20pf symmetry of propagation delay of transmitter rising edge w.r.t. falling edge t transsym -2.0 ? 2.0 s t transsym = max (t transpdf - t transpdr ) bus dominant time-out time t to(lin) ?25?ms duty cycle 1 @20.0 kbit/sec .396 ? ? %t bit c bus ;r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.744 x v bb , th dom ( max ) = 0.581 x v bb , v bb =7.0v - 18v; t bit = 50 s. d1 = t bus _ rec ( min ) / 2 x t bit ) duty cycle 2 @20.0 kbit/sec ? ? .581 %t bit c bus ;r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.284 x v bb , th dom ( max ) = 0.422 x v bb , v bb =7.6v - 18v; t bit = 50 s. d2 = t bus _ rec ( max ) / 2 x t bit ) duty cycle 3 @10.4 kbit/sec .417 ? ? %t bit c bus ;r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.778 x v bb , th dom ( max ) = 0.616 x v bb , v bb =7.0v - 18v; t bit = 96 s. d3 = t bus _ rec ( min ) / 2 x t bit ) duty cycle 4 @10.4 kbit/sec ? ? .590 %t bit c bus ;r bus conditions: 1nf; 1k ? | 6.8 nf; 660 ? | 10 nf; 500 ? th rec ( max ) = 0.251 x v bb , th dom ( max ) = 0.389 x v bb , v bb =7.6v - 18v; t bit = 96 s. d4 = t bus _ rec ( max ) / 2 x t bit ) note 1: time depends on external capacitance and load. test condition: c reg = 4.7uf, no resistor load. 2: for design guidance only, not tested.
? 2012 microchip technology inc. ds22306a-page 19 mcp2025 2.5 thermal specifications voltage regulator bus activity debounce time t bdb 30 80 250 s bus activity to voltage regulator enabled t bactive 35 ? 200 s voltage regulator enabled to ready t vevr 300 ? 1200 s ( note 1 ) chip select to ready mode t csr ??230s ( note 2 ) chip select to power-down t cspd ? ? 300 s ( note 2 ) short circuit to shut-down t shutdown 20 ? 100 s reset timing v reg ok detect to reset inactive t rpu ??60.0s ( note 2 ) v reg not ok detect to reset active t rpd ??60.0s ( note 2 ) note 1: time depends on external capacitance and load. test condition: c reg = 4.7uf, no resistor load. 2: for design guidance only, not tested. thermal characteristics parameter symbol typ. max. units test conditions recovery temperature ? recovery +140 ? ? c shutdown temperature ? shutdown +150 ? ? c short circuit recovery time t therm 1.5 5.0 ms thermal package resistances thermal resistance, 8-pdip ? ja 89.3 ? ? c/w thermal resistance, 8-soic ? ja 149.5 ? ? c/w thermal resistance, 8-qfn ? ja 48.0 ? ? c/w note 1: the maximum power dissipation is a function of t jmax , ? ja and ambient temperature t a . the maximum allowable power dissipation at an ambient temperature is p d = (t jmax - t a ) ?? ja . if this dissipation is exceeded, the die temperature will rise above 150 ? c and the mcp2025 will go into thermal shutdown. 2.4 ac specification (continued) ac characteristics v bb = 6.0v to 18.0v; t a = -40c to +125c parameter sym. min. typ. max. units test conditions
mcp2025 ds22306a-page 20 ? 2012 microchip technology inc. 2.6 timing diagrams and specifications figure 2-2: bus timing diagram figure 2-3: regulator bus wake timing diagram .95v lbus .05v lbus t transpdr t recpdr t transpdf t recpdf txd l bus rxd 50% 50% .50v bb 50% 50% 0.0v v reg l bus v wk(lbus) t vevr v reg-nom t bdb t bactive
? 2012 microchip technology inc. ds22306a-page 21 mcp2025 figure 2-4: cs/lwake, regulator and reset timing diagram figure 2-5: typical i bbq vs. temperature - 5.0v figure 2-6: i bbq trans-off vs. temperature - 5.0v figure 2-7: i bbq power-down vs. temperature - 5.0v t cspd t csr cs/lwake v reg v reg-nom reset t rpu t vevr t rpd 0 20 40 60 80 100 120 140 160 180 -45 -10 25 90 130 6v 12v 18v temperature(?c) i bbq (a) 0 10 20 30 40 50 60 70 80 -45 -10 25 90 130 6v 12v 18v temperature(?c) i bbq (a) 0 1 2 3 4 5 6 -45 -10 25 90 130 6v 12v 18v temperature(?c) i bbq (a)
mcp2025 ds22306a-page 22 ? 2012 microchip technology inc. figure 2-8: typical i bbq vs. temperature - 3.3v figure 2-9: i bbq trans-off vs. temperature - 3.3v figure 2-10: i bbq power-down vs. temperature - 3.3v 0 20 40 60 80 100 120 140 160 180 200 -45 -10 25 90 130 6v 12v 18v i bbq (a) temperature(?c) 0 10 20 30 40 50 60 70 80 90 -45 -10 25 90 130 6v 12v 18v temperature(?c) i bbq (a) 0 1 2 3 4 5 6 -45 -10 25 90 130 6v 12v 18v i bbq (a) temperature(?c)
? 2012 microchip technology inc. ds22306a-page 23 mcp2025 3.0 packaging information 3.1 package marking information legend: xx...x customer-specific information y year code (last digit of calendar year) yy year code (last 2 digits of calendar year) ww week code (week of january 1 is week ?01?) nnn alphanumeric traceability code pb-free jedec designator for matte tin (sn) * this package is pb-free. the pb-free jedec designator ( ) can be found on the outer packaging for this package. note : in the event the full microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. 3 e 3 e nnn 8-lead soic (150 mil) example : 2025-500 e/sn1220 256 xxxxxxxx xxxxxnnn yyww 8-lead pdip (300 mil) example yyww nnn xxxxxx xxxxxx pin 1 pin 1 202550 e/md ^^ 1220 256 8-lead dfn (4x4x0.9 mm) example 2025500 e/p ^^256 1220 3 e 3 e
mcp2025 ds22306a-page 24 ? 2012 microchip technology inc. 8-lead plastic dual flat, no lead package (md) ? 4x4x0.9 mm body [dfn] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technology drawing c04-131e sheet 1 of 2
? 2012 microchip technology inc. ds22306a-page 25 mcp2025 8-lead plastic dual flat, no lead package (md) ? 4x4x0.9 mm body [dfn] note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging microchip technology drawing c04-131e sheet 2 of 2
mcp2025 ds22306a-page 26 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds22306a-page 27 mcp2025 n e1 note 1 d 12 3 a a1 a2 l b1 b e e eb c
mcp2025 ds22306a-page 28 ? 2012 microchip technology inc. note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
? 2012 microchip technology inc. ds22306a-page 29 mcp2025 note: for the most current package drawings, please see the microchip packaging specification located at http://www.microchip.com/packaging
mcp2025 ds22306a-page 30 ? 2012 microchip technology inc.
? 2012 microchip technology inc. ds22306a-page 31 mcp2025 appendix a: revision history revision a (june 2012) ? original release of this document.
mcp2025 ds22306a-page 32 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds22306a-page 33 mcp2025 product identification system to order or obtain information, e. g., on pricing or delivery, refer to the factory or the listed sales office . device: mcp2025: lin transceiver with voltage regulator mcp2025t: lin transceiver with voltage regulator (tape and reel) (soic and dfn only) temperature range: e = -40c to +125c package: p = plastic dip (300 mil body), 8-lead sn = plastic small outline soic, 8-lead md = plastic dual flat dfn, 8-lead part no. ?x /xx package temperature range device examples: a) mcp2025-330e/sn: 3.3v, 8l-soic package b) mcp2025-330e/p: 3.3v, 8l-pdip package c) mcp2025-330e/md: 3.3v, 8l-dfn package d) mcp2025-500e/sn: 5.0v, 8l-soic package e) mcp2025-500e/p: 5.0v, 8l-pdip package f) mcp2025-500e/md: 5.0v, 8l-dfn package g) mcp2025t-330e/sn: tape and reel, 3.3v, 8l-soic package h) mcp2025t-500e/sn: tape and reel, 5.0v, 8l-soic package i) mcp2025t-330e/md: tape and reel, 3.3v, 8l-dfn package j) mcp2025t-500e/md: tape and reel, 5.0v, 8l-dfn package
mcp2025 ds22306a-page 34 ? 2012 microchip technology inc. notes:
? 2012 microchip technology inc. ds22306a-page 35 information contained in this publication regarding device applications and the like is provided only for your convenience and may be superseded by updates. it is your responsibility to ensure that your application meets with your specifications. microchip makes no representations or warranties of any kind whether express or implied, written or oral, statutory or otherwise, related to the information, including but not limited to its condition, quality, performance, merchantability or fitness for purpose . microchip disclaims all liability arising from this information and its use. use of microchip devices in life support and/or safety applications is entirely at the buyer?s risk, and the buyer agrees to defend, indemnify and hold harmless microchip from any and all damages, claims, suits, or expenses resulting from such use. no licenses are conveyed, implicitly or otherwise, under any microchip intellectual property rights. trademarks the microchip name and logo, the microchip logo, dspic, k ee l oq , k ee l oq logo, mplab, pic, picmicro, picstart, pic 32 logo, rfpic and uni/o are registered trademarks of microchip technology incorporated in the u.s.a. and other countries. filterlab, hampshire, hi-tech c, linear active thermistor, mxdev, mxlab, seeval and the embedded control solutions company are registered trademarks of microchip technology incorporated in the u.s.a. analog-for-the-digital age, application maestro, chipkit, chipkit logo, codeguard, dspicdem, dspicdem.net, dspicworks, dsspeak, ecan, economonitor, fansense, hi-tide, in-circuit serial programming, icsp, mindi, miwi, mpasm, mplab certified logo, mplib, mplink, mtouch, omniscient code generation, picc, picc-18, picdem, picdem.net, pickit, pictail, real ice, rflab, select mode, total endurance, tsharc, uniwindriver, wiperlock and zena are trademarks of microchip technology incorporated in the u.s.a. and other countries. sqtp is a service mark of mi crochip technology incorporated in the u.s.a. all other trademarks mentioned herein are property of their respective companies. ? 2012, microchip technology incorporated, printed in the u.s.a., all rights reserved. printed on recycled paper. isbn: 978-1-62076-393-3 note the following details of the code protection feature on microchip devices: ? microchip products meet the specification cont ained in their particular microchip data sheet. ? microchip believes that its family of products is one of the most secure families of its kind on the market today, when used i n the intended manner and under normal conditions. ? there are dishonest and possibly illegal methods used to breach the code protection feature. all of these methods, to our knowledge, require using the microchip produc ts in a manner outside the operating specif ications contained in microchip?s data sheets. most likely, the person doing so is engaged in theft of intellectual property. ? microchip is willing to work with the customer who is concerned about the integrity of their code. ? neither microchip nor any other semiconduc tor manufacturer can guarantee the security of their code. code protection does not mean that we are guaranteeing the product as ?unbreakable.? code protection is constantly evolving. we at microchip are co mmitted to continuously improvin g the code protection features of our products. attempts to break microchip?s code protection feature may be a violation of the digital millennium copyright act. if such acts allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that act. microchip received iso/ts-16949:2009 certification for its worldwide headquarters, design and wafer fabrication facilities in chandler and tempe, arizona; gresham, oregon and design centers in california and india. the company?s quality system processes and procedures are for its pic ? mcus and dspic ? dscs, k ee l oq ? code hopping devices, serial eeproms, microperipherals, nonvolatile memory and analog products. in addition, microchip?s quality system for the design and manufacture of development systems is iso 9001:2000 certified. quality management s ystem certified by dnv == iso/ts 16949 ==
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